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FPGA Softcore Processors and IP Acquisition に戻る

コロラド大学ボルダー校(University of Colorado Boulder) による FPGA Softcore Processors and IP Acquisition の受講者のレビューおよびフィードバック

4.0
52件の評価
14件のレビュー

コースについて

This course will introduce you to all aspects of development of Soft Processors and Intellectual Property (IP) in FPGA design. You will learn the extent of Soft Processor types and capabilities, how to make your own Soft Processor in and FPGA, including how to design the hardware and the software for a Soft Processor. You will learn how to add IP blocks and custom instructions to your Soft Processor. After the Soft Processor is made, you learn how to verify the design using simulation and an internal logic analyzer. Once complete you will know how to create and use Soft Processors and IP, a very useful skill. This course consists of 4 modules, approximately 1 per week for 4 weeks. Each module will include an hour or two of video lectures, reading assignments, discussion prompts, and an end of module assessment....

人気のレビュー

BT

2021年6月11日

Must-take Course for Hardware Engineeer. This course provides new concept about NIOS II 32-bit RISC Architecture and How HDL Simulation work

OS

2020年12月8日

I feel I did another small step towards mastering designing with fpga. Thank you!

フィルター:

FPGA Softcore Processors and IP Acquisition: 1 - 14 / 14 レビュー

by Claudio C

2021年12月11日

As the rest of the courses in this specialization, it is w​aste of time. Not worth it.

by Brandon R V

2020年10月11日

Loved the course!

I'm trying everything on my new DE10-Lite.

There's a steep learning curve on the first two weeks, but it all comes together mid week 2.

I had a lot of issues but all of them got solved in the discussion forum.

by Ovidiu S

2020年12月9日

I feel I did another small step towards mastering designing with fpga. Thank you!

by KIMBULOBBE H M T M S S

2020年10月14日

I learned a lot about modelsim that I was really needed.

by Saadiqbal

2021年8月3日

This course brought a great deal of insight in the designing of:

1. NIOS-II processor

2. Integration of pre-existing IP-cores with your design

3. The simulation, debugging and verification of hardware

The core concepts (I have taken from this course) are gemstone and will be guiding star for my future "Embedded system Designing endeavor".

by Bình Đ T

2021年6月12日

Must-take Course for Hardware Engineeer. This course provides new concept about NIOS II 32-bit RISC Architecture and How HDL Simulation work

by Habte G

2021年1月2日

Well prepared lessons(videos). Concise and complete.

by hamza s

2021年10月24日

Very helpful, Thnaks for all

by P R

2022年5月11日

Excellent

by Harold A M S

2021年9月7日

The course bring good theoric bases to IPCores but leaves short informacion about the Qsys use, memory map and others things that are necesary for system integration.

by Michael W B

2021年8月11日

I was hoping to get more lecture material on writing testbench code.

by Alex G

2021年9月29日

The examples do not compile easily in quartus 20.1. Coding examples need to include more about software and building something that actually works. Course needs to be updated.

by Anthony P

2021年11月18日

A lot of just slide reading and listing, last week of the course is cool because you understand a bit better the simulation

by Julien T

2022年2月3日

No hands on exercises, we "learn" how to make test benches without practising...