コロラド大学ボルダー校（University of Colorado Boulder） による FPGA Softcore Processors and IP Acquisition の受講者のレビューおよびフィードバック
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人気のレビュー
Must-take Course for Hardware Engineeer. This course provides new concept about NIOS II 32-bit RISC Architecture and How HDL Simulation work
I feel I did another small step towards mastering designing with fpga. Thank you!
FPGA Softcore Processors and IP Acquisition： 1 - 12 / 12 レビュー
by Claudio C
•In this course they do not teach you how to create a soft processor, they simply enumerate some of the existing soft processors and other IPs from major FPGA vendors. Then, they show you how to instantiate and configure a system using the Altera's NIOS-II soft processor and enumerate some of the miracles of the eclipse plugin system not knowing exactly what eclipse is.
There is also a very brief introduction to ModelSim for simulation and verification, which the only useful part of this course, and a less than brief introduction to Altera's SignalTap logic analyzer.
As with the rest of the courses of this "specialization", it is 10% useful and 90% useless.
Summarizing: In general, this course is at the level of a badly done free low quality webinar.
Not worth any money, not worth your time.
by Brandon R V
•Loved the course!
I'm trying everything on my new DE10-Lite.
There's a steep learning curve on the first two weeks, but it all comes together mid week 2.
I had a lot of issues but all of them got solved in the discussion forum.
by Ovidiu S
•I feel I did another small step towards mastering designing with fpga. Thank you!
by KIMBULOBBE H M T M S S
•I learned a lot about modelsim that I was really needed.
by Saadiqbal
•This course brought a great deal of insight in the designing of:
1. NIOS-II processor
2. Integration of pre-existing IP-cores with your design
3. The simulation, debugging and verification of hardware
The core concepts (I have taken from this course) are gemstone and will be guiding star for my future "Embedded system Designing endeavor".
by Bình Đ T
•Must-take Course for Hardware Engineeer. This course provides new concept about NIOS II 32-bit RISC Architecture and How HDL Simulation work
by Habte G
•Well prepared lessons(videos). Concise and complete.
by hamza s
•Very helpful, Thnaks for all
by Harold A M S
•The course bring good theoric bases to IPCores but leaves short informacion about the Qsys use, memory map and others things that are necesary for system integration.
by Michael W B
•I was hoping to get more lecture material on writing testbench code.
by Alex G
•The examples do not compile easily in quartus 20.1. Coding examples need to include more about software and building something that actually works. Course needs to be updated.
by Anthony P
•A lot of just slide reading and listing, last week of the course is cool because you understand a bit better the simulation
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