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VLSI CAD Part II: Layout に戻る

イリノイ大学アーバナ・シャンペーン校(University of Illinois at Urbana-Champaign) による VLSI CAD Part II: Layout の受講者のレビューおよびフィードバック

4.7
258件の評価
48件のレビュー

コースについて

You should complete the VLSI CAD Part I: Logic course before beginning this course. A modern VLSI chip is a remarkably complex beast: billions of transistors, millions of logic gates deployed for computation and control, big blocks of memory, embedded blocks of pre-designed functions designed by third parties (called “intellectual property” or IP blocks). How do people manage to design these complicated chips? Answer: a sequence of computer aided design (CAD) tools takes an abstract description of the chip, and refines it step-wise to a final design. This class focuses on the major design tools used in the creation of an Application Specific Integrated Circuit (ASIC) or System on Chip (SoC) design. Our focus in this part of the course is on the key logical and geometric representations that make it possible to map from logic to layout, and in particular, to place, route, and evaluate the timing of large logic networks. Our goal is for students to understand how the tools themselves work, at the level of their fundamental algorithms and data structures. Topics covered will include: technology mapping, timing analysis, and ASIC placement and routing. Recommended Background: Programming experience (C, C++, Java, Python, etc.) and basic knowledge of data structures and algorithms (especially recursive algorithms). An understanding of basic digital design: Boolean algebra, Kmaps, gates and flip flops, finite state machine design. Linear algebra and calculus at the level of a junior or senior in engineering. Elementary knowledge of RC linear circuits (at the level of an introductory physics class)....

人気のレビュー

NS

2020年6月15日

This course is good for anyone who wants himself in the EDA industry. The teacher is very passionate and engaging, the content is thorough and well prepared.

MM

2020年5月13日

It was a great course, I learned a lot of new things from it. And the presentation and explanation of concepts by Prof. Rob A. Rutenbar were amazing!!!

フィルター:

VLSI CAD Part II: Layout: 26 - 48 / 48 レビュー

by Kanishka S

2018年6月30日

Excellent course, very helpful!

by Pankaj M

2018年8月16日

Very good to learn algorithms!

by Shresth N

2019年4月10日

very nice and challenging

by Subhajit D

2022年5月22日

detailed , very helpful

by Jairam G

2020年6月9日

Excellent course

by GANGAVARAPU M S

2020年3月13日

out standing

by NEETU S

2020年6月20日

good course

by harishanker

2020年6月19日

good course

by Aravind K

2019年4月9日

no comments

by Arighna D

2019年4月30日

Excellent.

by BHARATH K

2017年10月31日

Amazing!!!

by VYDADI R R

2019年4月8日

EXCELLENT

by V V R R

2019年4月7日

THANK YOU

by SIDDEM M

2020年3月23日

good

by DHARANIKOTA T K

2020年3月19日

good

by CH M

2020年3月16日

NICE

by Navdeep D

2019年4月3日

Good

by vikas r

2020年9月9日

With this course, I'm delighted with the progress I did. I learnt a lot from the course. The assignments were good to review our knowledge.

by Saurabh Z

2020年7月13日

Nice informative course for beginners.

by SAKHAMURI M

2020年4月20日

good idea to help for students

by HARSH V P

2019年4月9日

excelllent

by Tanj B

2022年1月1日

Title should be "Algorithms for layout and timing in VLSI CAD". This course contains nothing that teaches you VLSI design or actual use of modern EDA tools. It does present an interesting and clear explanation of basic algorithms, so if that is what you are looking for (either because you want to create such tools, or you like to know what is happening inside them) this is a recommended course, but if you are looking for how to work with VLSI CAD tools, this is not it.

by Isaac K

2020年5月31日

More interesting then the logic ,exam is very tedious! Still wish a vlsi series was less emphasis on software algorithms.